COMP_ENG 303: Advanced Digital Design

Quarter Offered

Fall : TuTh 3:30-4:50 ; S. Memik
Spring : TuTh 3:30-4:50 ; Gu




COMP_ENG 303: Advanced Digital Design

Quarter Offered

Fall : TuTh 3:30-4:50 ; S. Memik
Spring : TuTh 3:30-4:50 ; Gu




Overview of digital logic design. Implementation technologies, timing in combinational and sequential circuits, EDA tools, basic arithmetic units, introduction to simulation and synthesis using Verilog/VHDL. (This course also fulfills the systems breadth requirement for the Computer Science major.)


John F. Wakerly, Digital Design Principles and Practices, Fifth Edition, with Verilog, Pearson, ISBN-13: 9780134460093


  1. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals, Pearson/Prentice Hall, latest Edition
  2. Logic Synthesis and Verification Algorithms, Hachtel & Somenzi, Springer
  3. CMOS VLSI Design: A Circuits and Systems Perspective, Weste & Harris, 4th Ed., Addison Wesley   

COURSE INSTRUCTOR: Prof. Seda Ogrenci Memik (Fall), Prof. Jie Gu (Spring)

COURSE COORDINATORS: Prof. Seda Ogrenci Memik, Prof. Jie Gu

COURSE GOALS: Cover the digital design knowledges on combinational logic circuit, sequential logic circuits, logic optimization, finite state machine design, counter and programmable logic, etc. The course also provides basic training on the use of a hardware-description language of Verilog.  Material reinforced with the use of contemporary EDA tools.


  • 1) Number systems
  • 2) Logic simplification using Boolean algebra and Karnaugh maps
  • 3) Combinational logic implementation using AND/OR/NOT, NAND/NOR gates
  • 4) Exposure to basic components, e.g., adders, decoders, and multiplexers.
  • 5) Exposure to memory elements and flip-flops


DETAILED COURSE TOPICS (Subject to adjustments):

Week 1: Introduction to Logic Design: class administration, digital design methodology, transistor fundamentals.

Week 2: Review of Boolean logic, Karnaugh maps, basic logic circuit design

Week 3: Two Level Logic Minimization Algorithms: Quine McCluskey Method, branch and bound approach,

Week 4-5: Introduction to Verilog/VHDL and Modern Digital Design Tools.

Week 6: Arithmetic Circuits Design.

Week 7: Sequential Circuit Design and Timing Analysis. 

Week 8: Finite State Machine Design and Design Optimization.

Week 9: Counter and Programmable Logic Technologies such as FPGA.

Week 10: Digital System Design, Power Analysis and Technology Integration.

COMPUTER USAGE: Students learn to use commercial EDA tools such as Cadence Genus, Xcelium, Innovus, for the design, synthesis and simulation of large-scale modern digital circuits through Verilog/VHDL language.  Students are required to access the Unix/Linux workstations in the ECE Wilkinson lab physically or remotely.


  • Homework & Lab assignments - 45%
  • Midterm exam - 25%
  • Final exam - 30%

COURSE OBJECTIVES: Students completing this course should be able to

  • Acquire enough basic logic design knowledge for advanced study topics related to VLSI design, computer architecture, microprocessor system, design automation, etc.
  • Perform basic logic circuit design including both combinational and sequential circuits.
  • Perform two-level logic minimization using Boolean algebra, Karnaugh maps, the Quine McCluskey method, Branch and Bound method, etc.
  • Acquire practical skills of coding hardware description language Verilog/VHDL for modern digital design.
  • Know how to use modern EDA design tools to perform simple logic circuit design.
  • Perform simple arithmetic logic circuit design.
  • Understand sequential circuit design and timing constraints.
  • Perform design of finite state machine.
  • Apply the learned digital techniques to the design of a larger scale digital system.