Faculty Directory
Jie GuEducation
Ph.D Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN
Master of Science, Texas A&M University, College Station, TX
Bachelor of Science, Tsinghua University, Beijing, China
Research Interests
AI Accelerators; Energy Efficient Analog Mixed-signal Computing; AI Empowered Biomedical Device and Human Machine Interface; Emerging Neuromorphic Computing Design;
Selected Publications
[1] Zhiwei Zhong, He Yu, William K. McGarry, Jie Gu, A Neural Interface SoC for Smart Glasses with Low-Power Neural Commanding and Efficient LoRA-Enabled On-Chip Learning, International Solid-State Circuit Conference (ISSCC), 2026.
[2] Xi Chen, AJ Liss, William T. Covington, Yiqi Li, Muhammmad M. Khellah, Raveesh Magod, Kang Wei, Sid Das, Xin Zhang, Jie Gu, Proactive Supply Regulation with Online Learning for Variation-Tolerant, Workload-Aware Droop Mitigation in 28nm CMOS, International Solid-State Circuit Conference (ISSCC), 2026.
[3] Xi Chen, Yuhao Ju, Jie Gu, Development of a Physics-Informed Neural Network Model for Rapid Power Integrity Analysis in Die-Level and Die-Package Co-Design for 2.5-D Chiplet Solutions, International Symposium on Low Power Electronics and Design (ISLPED), 2025.
[4] Yijie Wei, Zhiwei Zhong, Lance Go, Jie Gu, A Sub 1 uJ/class Headset-integrated Mind Imagery and Control SoC for VR/MR Applications with Teacher-Student CNN and General-purpose Instruction Set Architecture, International Solid-State Circuit Conference (ISSCC), 2024.
[5] Yuhao Ju, Ganqi Xu, Jie Gu, A 28nm Physics Computing Unit Supporting Emerging Physics-informed Neural Network and Finite Element Method for Real-time Scientific Computing on Edge Devices, International Solid-State Circuit Conference (ISSCC), 2024.
[6] Shiyu Guo, Sachin Sapatnekar, Jie Gu, A 28nm Physical-based Ray-Tracing Rendering Processor for Photorealistic Augmented Reality with Inverse Rendering and Background Clustering for Mobile Devices, International Solid-State Circuit Conference (ISSCC), 2024.
[7] Shiyu Guo, Yuhao Ju, Xi Chen, Jie Gu, LLM-MARK: A Computing Framework on Efficient Watermarking of Large Language Models for Authentic Use of Generative AI at Local Devices, Design Automation Conference (DAC), 2024.
[8] Qiankai Cao, Xi Chen, Jie Gu, Development of Tropical Algebraic Accelerator with Energy Efficient Time-Domain Computing for Combinatorial Optimization and Machine Learning , International Symposium on Low Power Electronics Design (ISLPED), 2023.
[9] Yuhao Ju, Yijie Wei, Xi Chen, Jie Gu, A General-Purpose Compute-in-Memory Processor Combining CPU and Deep Learning with State-of-the-art CPU Efficiency and Enhanced Data Locality, VLSI Symposium on Circuits and Technology (VLSI), 2023.
[10] Yijie Wei, Xi Chen, Jie Gu, Human Activity Recognition SoC for AR/VR with Integrated Neural Sensing, AI Classification and Chained Infrared Communication for Multi-chip Collaboration, VLSI Symposium on Circuits and Technology (VLSI), 2023.
[11] Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket Desai, Jie Gu, Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs, VLSI Symposium on Circuits and Technology (VLSI), 2023.
[12] Xi Chen, Aly Shoukry, Tianyu Jia, Xin Zhang, Raveesh Magod, Nachiket Desai, Jie Gu, A 65nm Fully-integrated Fast-switching Buck Converter with Resonant Gate Drive and Automatic Tracking, Custom Integrated Circuit Conference (CICC), 2023.
[13] Yijie Wei, Xi Chen, Jie Gu, A 65nm Implantable Gesture Classification SoC for Rehabilitation with Enhanced Data Compression and Encoding for Robust Neural Network Operation Under Wireless Power Condition, Custom Integrated Circuit Conference (CICC), 2022.
[14] Yijie Wei, Zhiwei Zhong, Jie Gu, Human Emotion Based Real-time Memory and Computation Management on Resource-Limited Edge Devices, Design Automation Conference (DAC), 2022.
[15] Qiankai Cao, Jie Gu, A Sparse Convolution Neural Network Accelerator for 3D/4D Point-Cloud Image Recognition on Low Power Mobile Device with Hopping-Index Rule Book for Efficient Coordinate Management, Symposium on VLSI Circuits (VLSIC), 2022.
[16] Yuhao Ju, Jie Gu, A 65nm Systolic Neural CPU Processor for Combined Deep Learning and General-Purpose Computing with 95% PE Utilization, High Data Locality and Enhanced End-to-End Performance, International Conference on Solid-state Circuits (ISSCC), 2022.
[17] Zhengyu Chen, Xi Chen, Jie Gu, A 65nm 3T Dynamic Analog RAM Based Computing-in-Memory Macro and CNN Accelerator with Retention Enhance, Adaptive Analog Sparsity and 44TOPS/W System Energy Efficiency, International Solid-state Circuit Conference (ISSCC), 2021.
[18] Zhengyu Chen, Shihua Fu, Qiankai Cao, Jie Gu, A Mixed-signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-signal On-chip Training for Low Power Edge Devices, Symposium on VLSI Circuits (VLSIC), 2020.
[19] Tianyu Jia, Yuhao Ju, Jie Gu, A Compute-Adaptive Elastic Clock-Chain Technique with Dynamic Timing Enhancement for 2D PE-Array-Based Accelerators, International Solid-state Circuit Conference (ISSCC), 2020.
[20] Yijie Wei, Kofi Otseidu, Jie Gu, Exploration of Design Space and Runtime Optimization for Affective Computing in Machine Learning Empowered Ultra-low Power SoC, Design Automation Conference (DAC), 2020.
