Faculty Directory
Russell Joseph

Associate Professor of Electrical Engineering and Computer Science


2145 Sheridan Road
Tech Room L467
Evanston, IL 60208-3109

847-491-3061Email Russell Joseph


Current Projects

Russ Joseph's Homepage


Electrical Engineering and Computer Science


Ph.D. Electrical Engineering, Princeton University, Princeton, NJ

M.A. Electrical Engineering, Princeton University, Princeton, NJ

B.S. Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA

Research Interests

Computer architecture, microprocessor design for reliability and variability tolerance, power-aware computing

Selected Publications

  • Joseph, Russ; Findler, Robert Bruce; Hoang, Giang, “Exploring circuit timing-aware language and compilation”, ACM SIGPLAN Notices, (2012)
  • Dick, Robert P.; Joseph, Russ; He, Xuejing, “Spatially-and temporally-adaptive communication protocols for zero-maintenance sensor networks relying on opportunistic energy scavenging”, CODES+ISSS'12 - Proceedings of the 10th ACM International Conference on Hardware/Software-Codesign and System Synthesis, Co-located with ESWEEK, (2012)
  • Z. Li, M. Mohamed, X. Chen, E. Dudley, K. Meng, L. Shang, A. R. Mickelson, R. Joseph, M. Vachharajani, B. Schwartz and Y. Sun, “Reliability Modeling and Management of Nanophotonic On-Chip Networks”, Ieee Transactions on Very Large Scale Integration (Vlsi) Systems, (2012)
  • P. G. Bridges, D. Arnold, K. T. Pedretti, M. Suresh, F. Lu, P. Dinda, R. Joseph and J. Lange, “Virtual-machine-based emulation of future generation high-performance computing systems”, International Journal of High Performance Computing Applications, (2012)
  • Joseph, R.; Liu, S.; Lu, F.; Trajcevski, G., “Efficient parameter variation sampling for architecture simulations”, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, (2011)
  • Joseph, R.; Xin, J., “Identifying and predicting timing-critical instructions to boost timing speculation”, Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture, (2011)
  • G Hoang;RB Findler;R Joseph, “Exploring Circuit Timing-aware Language and Compilation”, Acm Sigplan Notices, (2011)
  • ... Bae, J Lange, L Zhang, P Dinda, R Joseph, “A Case for Alternative Nested Paging Models for Virtualized Systems”, IEEE IEEE Computer ..., (2010)