EVENT DETAILS
Wednesday / CS Seminar
May 13 / 12:00 PM
Hybrid / Mudd 3514
Speaker: Zhiru Zhang, Cornell University
Title: Hypothesizing Autonomous Accelerator Design
Abstract: We are living through a fundamental shift in computing, where performance and efficiency gains increasingly come from specialized accelerators tailored to "hot" domains like AI. Yet as accelerator-centric computing proliferates, it continues to build atop a longstanding disconnect between the way we design these systems and the way we program them. This divide slows hardware innovation, complicates the software stack, and makes accelerators far harder to evolve than the rapidly changing applications they are meant to serve. While increasingly capable AI agents can help alleviate some of these challenges, many key pieces are still missing to truly close this loop. In this talk, I will share lessons learned from our recent work on (1) workload mapping for emerging accelerator architectures, (2) abstractions that help unify accelerator design and programming, and (3) agentic approaches to compiler construction. I will discuss how these directions may collectively move us closer to a future of more autonomous accelerator design.
Bio: Zhiru Zhang is a Professor in the School of ECE at Cornell University. His current research investigates new algorithms, design methodologies, and automation tools for heterogeneous computing. Dr. Zhang is an IEEE Fellow and has been honored with the Intel Outstanding Researcher Award, AWS AI Amazon Research Award, Facebook Research Award, Google Faculty Research Award, DAC Under-40 Innovators Award, DARPA Young Faculty Award, IEEE CEDA Ernest S. Kuh Early Career Award, and NSF CAREER Award. He has also received 10+ best paper awards from premier conferences and journals in computer systems and EDA. Prior to joining Cornell, he co-founded AutoESL, a high-level synthesis start-up later acquired by Xilinx (now part of AMD). AutoESL's HLS tool evolved into Vivado HLS (now Vitis HLS), which is widely used for designing FPGA-based hardware accelerators.
TIME Wednesday May 13, 2026 at 12:00 PM - 1:00 PM
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CONTACT Wynante R Charles wynante.charles@northwestern.edu
CALENDAR Department of Computer Science (CS)